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1 of 16 1 description the iw1677 is a high performance ac/dc power supply controller which uses digital control technology to build peak current mode pwm fyback power supplies. the device together with an external active device (depletion mode nfet or npn bjt) provides a fast start-up without compromising no-load power loss. the device directly drives a power bjt and operates in quasi-resonant mode to provide high effciency along with a number of key built-in protection features while minimizing the external component count, simplifying emi design and lowering the total bill of material cost. the iw1677 removes the need for secondary feedback circuitry while achieving excellent line and load regulation. it also eliminates the need for loop compensation components while maintaining stability over all operating conditions. pulse-by-pulse waveform analysis allows for a loop response that is much faster than traditional solutions, resulting in improved dynamic load response for both one-time and repetitive load transients. the built-in power limit function enables optimized transformer design in universal off-line applications and allows for a wide input voltage range. dialogs innovative proprietary technology ensures that power supplies built with the iw1677 can achieve both highest average effciency and less than 20mw no-load power consumption, and have fast dynamic load response in a compact form factor. the active start-up scheme enables shortest possible start-up time without sacrifcing no-load power loss. 2 features no-load power consumption < 20mw at 230 v ac with typical application circuit (5 star rating) fast dynamic load response for both one-time and repetitive load transients very tight constant voltage and constant current regulation over entire operating range primaccurate tm primary-side feedback eliminates opto-isolators and simplifes design low emi design enhances manufacturability intrinsically low common mode noise optimized 72khz maximum pwm switching frequency achieves best size and effciency active start-up scheme enables fastest possible start- up 3 applications compact low power ac/dc adapter/chargers for cell phones, pdas, digital still cameras linear ac/dc replacement adaptive multi-mode pwm/pfm control improves effciency quasi-resonant operation for highest overall effciency direct drive of low-cost bjt switch dynamic base current control no external loop compensation components required complies with epa 2.0 energy-effciency specifcations with ample margin built-in soft start built-in short circuit protection and output overvoltage protection built-in current sense resistor short circuit protection no audible noise over entire operating range iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
2 of 16 figure 3.1 : iw1677 typical application circuit (achieving < 20mw no-load power consumption. using depletion mode nfet as active start-up device) l + v out gnd + u1 iw1677 v cc v sense asu output gnd i sense 1 5 3 6 4 2 n l + v out gnd + u1 iw1677 v cc v sense asu output gnd i sense 1 5 3 6 4 2 n figure 3.2 : iw1677 typical application circuit (achieving < 20mw no-load power consumption. using npn bjt as active start-up device) iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
3 of 16 4 pinout description pin no. pin name type pin description 1 v cc power input power supply for control logic. 2 v sense analog input auxiliary voltage sense (used for primary regulation). 3 asu output control signal for active start-up device (bjt or depletion nfet). 4 i sense analog input primary current sense. used for cycle-by-cycle peak current control and limit. 5 gnd ground ground. 6 output output base drive for bjt. figure 4.1 : 6-pin sot23 package iw1677 v cc v sense asu output gnd i sense 1 2 3 6 4 5 iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
4 of 16 absolute maximum ratings are the parameter values or ranges which can cause permanent damage if exceeded. for maximum safe operating conditions, refer to electrical characteristics in section 6. 5 absolute maximum ratings parameter symbol value units dc supply voltage range (pin 1, i cc = 20ma max) v cc -0.3 to 18.0 v continuous dc supply current at v cc pin (v cc = 15v) i cc 20 ma asu output (pin 3) -0.3 to 18.0 v output (pin 6) -0.3 to 4.0 v v sense input (pin 2, i vsense 10ma) -0.7 to 4.0 v i sense input (pin 4) -0.3 to 4.0 v maximum junction temperature t jmax 150 c storage temperature t stg C65 to 150 c thermal resistance junction-to-ambient ja 190 c/w esd rating per jedec jesd22-a114 2,000 v latch-up test per jedec 78 100 ma iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
5 of 16 v cc = 12v, -40c t a 85c, unless otherwise specifed 6 electrical characteristics parameter symbol test conditions min typ max unit v sense section (pin 2) input leakage current i bvs v sense = 2v 1 a nominal voltage threshold v sense(nom) t a =25c, negative edge 1.518 1.533 1.548 v output ovp threshold -00 (note 1) v sense(max) t a =25c, negative edge 1.742 1.834 1.926 v output ovp threshold -01 (note 1) v sense(max) t a =25c, negative edge, load = 100 % 1.830 1.926 2.022 v output ovp threshold -03 (note 1) v sense(max) t a =25c, negative edge, load = 100 % 1.873 1.972 2.071 v output ovp threshol -05 (note 1) v sense(max) t a =25c, negative edge, load = 100 % 1.786 1.880 1.974 v i sense section (pin 4) overcurrent threshold v ocp 1.11 1.15 1.19 v i sense regulation upper limit (note 3) v ipk(high) 0.97 1.00 1.03 v i sense regulation lower limit (note 3) v ipk(low) 0.22 0.23 0.24 v input leakage current i lk i sense = 1.0 v 1 a output section (pin 6) output low level on-resistance r ds(on)lo i sink = 5ma 1 3 w switching frequency (note 2) f sw > 50% load 72 khz v cc section (pin 1) maximum operating voltage (note 1) v cc(max) 16 v start-up threshold v cc(st) v cc rising 10.0 11.0 12.0 v undervoltage lockout threshold v cc(uvl) v cc falling 3.8 4.0 4.2 v start-up current i in(st) v cc = 10v 1.0 1.7 3.0 a quiescent current i ccq v cc = 14v, without driver switching 2.7 4.0 ma no-load operating current (note 1 & 4) i cc_nl no-load operation in ddpwm mode 0.32 0.46 0.62 ma zener breakdown voltage v zb zener current = 5ma t a =25c 18.5 19.5 20.5 v asu section (pin 3) maximum operating voltage (note 1) v asu(max) 16 v resistance between v cc and asu r vcc_asu 600 830 1100 k notes: note 1. these parameters are not 100% tested. they are guaranteed by design and characterization. note 2. operating frequency varies based on the load conditions, see section 9.6 for more details. note 3. these parameters are not 100% tested, guaranteed by design and characterization. refer to section 9.0 for operation details. note 4. see sections 9.6 and 9.7 for details. iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
6 of 16 7 typical performance characteristics figure 7.1 : v cc uvlo vs. temperature figure 7.2 : start-up threshold vs. temperature 3.88 -50 -25 3.92 3.96 4.00 4.04 4.08 0 25 50 75 100 125 150 v cc uvlo (v) ambient temperature (oc) 10.0 -50 -25 10.4 10.8 11.2 11.6 12.0 0 25 50 75 100 125 150 v cc start-up threshold (v) ambient temperature (oc) 60 -50 -25 64 68 72 76 80 0 25 50 75 100 125 150 f sw @ load > 50% (khz) ambient temperature (oc) 1.990 -50 -25 1.994 1.998 2.002 2.006 2.010 0 25 50 75 100 125 150 internal reference voltage (v) ambient temperature (oc) 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 6.0 9.0 12.0 v cc (v) v cc supply start-up current (a) figure 7.3 : switching frequency vs. temperature 1 figure 7.4 : internal reference vs. temperature figure 7.5 : v cc vs. v cc supply start-up current notes: note 1. operating frequency varies based on the load conditions, see section 9.6 for more details. iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
7 of 16 8 functional block diagram figure 8.1 : iw1677 functional block diagram 1 6 5 4 g n d o u t p u t s t a r t-up d i g i t a l l o g i c c o n t r o l s i g n a l c o n d i t i o n i n g d a c 1.15v b j t b a s e d r i v e e nable 2 ocp = 1.533v v cc v fb v sense(nom) v sense i sense v ipk i pk 3 asu e nable 0.23v ~ 1.00v iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
8 of 16 9 theory of operation the iw1677 is a digital controller which uses a new, proprietary primary-side control technology to eliminate the opto-isolated feedback and secondary regulation circuits required in traditional designs. this results in a low-cost solution for low power ac/dc adapters. the core pwm processor uses fxed-frequency discontinuous conduction mode (dcm) operation at higher power levels and switches to variable frequency operation at light loads to maximize effciency. furthermore, dialogs digital control technology enables fast dynamic response, tight output regulation, and full featured circuit protection with primary-side control. referring to the block diagram in figure 8.1, the iw1677 operates in peak current mode control. the digital logic control block generates the switching on-time and off-time information based on the output voltage and current feedback signal and provides commands to dynamically control the external bjt base current. the i sense is an analog input confgured to sense the primary current in a voltage form. in order to achieve the peak current mode control and cycle-by-cycle current limit, the v ipk sets the threshold for the i sense to compare with, and it varies in the range of 0.23v (typical) and 1.00v (typical) under different line and load conditions. the system loop is automatically compensated internally by a digital error amplifer. adequate system phase margin and gain margin are guaranteed by design and no external analog components are required for loop compensation. the iw1677 uses an advanced digital control algorithm to reduce system design time and increase reliability . furthermore, accurate secondary constant-current operation is achieved without the need for any secondary-side sense and control circuits. the iw1677 uses adaptive multi-mode pwm/pfm control to dynamically change the bjt switching frequency for effciency, emi, and power consumption optimization. in addition, it achieves unique bjt quasi-resonant switching to further improve effciency and reduce emi. built-in single-point fault protection features include overvoltage protection (ovp), output short circuit protection (scp), over current protection (ocp), and i sense fault detection. in particular, it ensures that power supplies built with the iw1677 can meet 5-star energy saving requirement and achieve fast dynamic load response. dialogs digital control scheme is specifcally designed to address the challenges and trade-offs of power conversion design. this innovative technology is ideal for balancing new regulatory requirements for green mode operation with more practical design considerations such as lowest possible cost, smallest size and high performance output control. 9.1 pin detail pin 1 C v cc power supply for the controller during normal operation. the controller will start up when v cc reaches 11.0v (typical) and will shut-down when the v cc voltage is 4.0v (typical). a decoupling capacitor of 0.1f or so should be connected between the v cc pin and gnd. pin 2 C v sense sense signal input from auxiliary winding. this provides the secondary voltage feedback used for output regulation. pin 3 C asu control signal for active startup device. this signal is pulled low after start-up is fnished to cut off the active device. pin 4 C i sense primary current sense. used for cycle-by-cycle peak current control and limit. pin 5 C gnd ground. pin 6 C output base drive for the external power bjt switch. iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
9 of 16 9.2 start-up refer to figure 3.1 and figure 3.2 for active start-up circuits using external depletion nfet and bjt respectively. prior to start-up, the depletion nfet or the bjt is turned on, allowing the start-up current to charge the v cc bypass capacitor. when the v cc bypass capacitor is charged to a voltage higher than the start-up threshold v cc(st) , the enable signal becomes active and the iw1677 commences soft start function. during this start-up process an adaptive soft-start control algorithm is applied, where the initial output pulses will be small and gradually get larger until the full pulse width is achieved. the peak current is limited cycle by cycle by the i peak comparator. if at any time the v cc voltage drops below undervoltage lockout (uvlo) threshold v cc(uvl) then the iw1677 goes to shutdown. at this time enable signal becomes low and the v cc capacitor begins to charge up again towards the start-up threshold to initiate a new soft-start process. while the enable signal initiates the soft-start process, it also pulls down the asu pin voltage at the same time, which turns off the depletion nfet or the bjt, thus minimizing the no-load standby power consumption. for the active start-up scheme in figure 3.2, the start-up resistors connected between the base of the bjt and dc input still conduct current after start-up is fnished. their resistance needs to be large enough to minimize no-load power consumption, meanwhile the bjt with ample gain should be selected in order to obtain a suffcient charge current for a fast start-up. v cc v cc(st) enable start-up sequencing asu figure 9.1 : start-up sequencing diagram 9.3 understanding primary feedback figure 9.2 illustrates a simplifed fyback converter. when the switch q1 conducts during t on (t), the current i g (t) is directly drawn from rectifed sinusoid v g (t). the energy e g (t) is stored in the magnetizing inductance l m . the rectifying diode d1 is reverse biased and the load current i o is supplied by the secondary capacitor c o . when q1 turns off, d1 conducts and the stored energy e g (t) is delivered to the output. + v in (t) t s (t) i o v o d1 q1 n:1 v aux c o v g (t) i g (t) + ? i in (t) i d (t) figure 9.2 : simplifed flyback converter iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
10 of 16 in order to tightly regulate the output voltage, the information about the output voltage and load current need to be accurately sensed. in the dcm fyback converter, this information can be read via the auxiliary winding or the primary magnetizing inductance (l m ). during the q1 on-time, the load current is supplied from the output flter capacitor c o . the voltage across l m is v g (t), assuming the voltage dropped across q1 is zero. the current in q1 ramps up linearly at a rate of: ( ) ( ) gg m di t v t dt l = (9.1) at the end of on-time, the current has ramped up to: ( ) ( ) _ g on g peak m vt t it l = (9.2) this current represents a stored energy of: ( ) 2 _ 2 m g g peak l e it = (9.3) when q1, turns off at t o , i g (t) in l m forces a reversal of polarities on all windings. ignoring the communication-time caused by the leakage inductance l k at the instant of turn-off t o , the primary current transfers to the secondary at a peak amplitude of: ( ) ( ) _ p d g peak s n it i t n = (9.4) assuming the secondary winding is master, and the auxiliary winding is slave, v aux 0v v aux = -v in x n aux n p v aux = v o x n aux n s 1 2 figure 9.3 : auxiliary voltage waveforms the auxiliary voltage is given by: ( ) v aux aux o s n vv n = +? (9.5) and refects the output voltage as shown in figure 9.3. the voltage at the load differs from the secondary voltage by a diode drop and ir losses. thus, if the secondary voltage is always read at a constant secondary current, the difference between the output voltage and the secondary voltage will be a fxed v. furthermore, if the voltage can be read when the secondary current is small, v will also be small. with the iw1677, v can be ignored. iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
11 of 16 the real-time waveform analyzer in the iw1677 reads this information cycle by cycle. the part then generates a feedback voltage v fb . the v fb signal precisely represents the output voltage under most conditions and is used to regulate the output voltage. 9.4 constant voltage operation after soft-start has been completed, the digital control block measures the output conditions. it determines output power levels and adjusts the control system according to a light load or heavy load. if this is in the normal range, the device operates in the constant voltage (cv) mode, and changes the pulse width (t on ) and off time (t off ) in order to meet the output voltage regulation requirements. if no voltage is detected on v sense it is assumed that the auxiliary winding of the transformer is either open or shorted and the iw1677 shuts down. 9.5 constant current operation the constant current (cc mode) is useful in battery charging applications. during this mode of operation the iw1677 will regulate the output current at a constant level regardless of the output voltage, while avoiding continuous conduction mode. to achieve this regulation the iw1677 senses the load current indirectly through the primary current. the primary current is detected by the i sense pin through a resistor from the bjt emitter to ground. output voltage output current i out(cc) v nom cv mode cc mode figure 9.4 : power envelope 9.6 multi-mode pwm/pfm control and quasi-resonant switching the iw1677 uses a proprietary adaptive multi-mode pwm /pfm control to dramatically improve the light-load effciency and thus the overall average effciency. during the constant voltage (cv) operation, the iw1677 normally operates in a pulse-width-modulation (pwm) mode during heavy load conditions. in the pwm mode, the switching frequency keeps around constant. as the output load i out is reduced, the on-time t on is decreased, and the controller adaptively transitions to a pulse-frequency-modulation (pfm) mode. during the pfm mode, the bjt is turned on for a set duration under a given instantaneous rectifed ac input voltage, but its off time is modulated by the load current. with a decreasing load current, the off time increases and thus the switching frequency decreases. when the switching frequency approaches to human ear audio band, the iw1677 transitions to a second level of pwm mode, namely deep pwm mode (dpwm). during the dpwm mode, the switching frequency keeps around 25 khz in order to avoid audible noise. as the load current is further reduced, the iw1677 transitions to a second level of pfm iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
12 of 16 mode, namely deep pfm mode (dpfm), which can reduce the switching frequency to a very low level. although the switching frequency drops across the audible frequency range during the dpfm mode, the output current in the power converter has reduced to an insignifcant level in the dpwm mode before transitioning to the dpfm mode. therefore, the power converter practically produces no audible noise, while achieving high effciency across varying load conditions. as the load current reduces to very low or no-load condition, the iw1677 transitions from the dpfm to the third level of pwm mode, namely deep-deep pwm mode (ddpwm), where the switching frequency is fxed at around 2.1 khz. the iw1677 also incorporates a unique proprietary quasi-resonant switching scheme that achieves valley-mode turn on for every pwm/pfm switching cycle, during all pfm and pwm modes and in both cv and cc operations. this unique feature greatly reduces the switching loss and dv/dt across the entire operating range of the power supply. due to the nature of quasi-resonant switching, the actual switching frequency can vary slightly cycle by cycle, providing the additional beneft of reducing emi. together these innovative digital control architecture and algorithms enable the iw1677 to achieve highest overall effciency and lowest emi, without causing audible noise over entire operating range. 9.7 less than 20mw no-load power with fast load transient response the iw1677 features the distinctive ddpwm control at no-load conditions to help achieve super-low no-load power consumption (< 20mw for typical applications) and meanwhile to ensure fast dynamic load response. the power supply system designs including the pre-load resistor selection should ensure the power supply can stably operate in the ddpwm mode at the steady-state no-load condition. if the pre-load resistor is too small, the no-load power consumption will increase; on the other hand, if it is too large, the output voltage may increase and even cause overvoltage since the switching frequency is fxed at around 2.1khz. for typical designs, the pre-load resistor is in the range of 5k w to 8k w . aside from the appropriate use of pre-load resistor, the iw1677 enjoys a few other features to bring down no-load power consumption as well. first, the iw1677 implements an intelligent low-power management technique that achieves ultra-low chip operating current at the no-load, typically around 500a. second, the use of the power switch of bjt instead of mosfet requires a lower driving voltage, enabling a low uvlo threshold as low as 4.0v (typical). the power supply system design can fully utilize this low uvlo feature to have a low vcc voltage at the no-load operation in order to minimize the no-load power. in addition, the active start-up scheme with depletion nfet eliminates the startup resistor power consumption after the enable signal becomes active. all together these features ensure with the lowest system cost power supplies built with the iw1677 can achieve less than 20mw no- load power consumption at 230v ac input and very tight constant voltage and constant current regulation over the entire operating range including the no-load operation. while achieving super-low no-load power consumption, the iw1677 implements innovative proprietary digital control technology to intelligently detect any load transient events, and achieve fast dynamic load response for both one- time and repetitive load transients. in particular, for load transients that are demanded in some applications as from absolutely no load to full load, the iw1677 can still guarantee a fast enough response to meet the most stringent requirements, with the no-load operating frequency designed at around 2.1khz. 9.8 variable frequency operation mode at each of the switching cycles, the falling edge of v sense will be checked. if the falling edge of v sense is not detected, the off-time will be extended until the falling edge of v sense is detected. the maximum allowed transformer reset time is 110s. when the transformer reset time reaches 125s, the iw1677 shuts off. 9.9 internal loop compensation the iw1677 incorporates an internal digital error amplifer with no requirement for external loop compensation. for a typical power supply design, the loop stability is guaranteed to provide at least 45 degrees of phase margin and -20db of gain margin. iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
13 of 16 9.10 voltage protection features the secondary maximum output dc voltage is limited by the iw1677. when the v sense signal exceeds the output ovp threshold at point 1 indicated in figure 9.3 the iw1677 shuts down. the iw1677 protects against input line undervoltage by setting a maximum t on time. since output power is proportional to the squared v in t on product then for a given output power as v in decreases the t on will increase. thus by knowing when the maximum t on time occurs the iw1677 detects that the minimum vin is reached, and shuts down. the maximum t on limit is set to 15.6s. also, the iw1677 monitors the voltage on the v cc pin and when the voltage on this pin is below uvlo threshold the ic shuts down immediately . when any of these faults are met the ic remains biased to discharge the v cc supply. once v cc drops below uvlo threshold, the controller resets itself and then initiates a new soft-start cycle. the controller continues attempting start- up until the fault condition is removed. 9.11 pcl, ocp and srs protection peak-current limit (pcl), over-current protection (ocp) and sense-resistor short protection (srsp) are features built- in to the iw1677. with the isense pin the iw1677 is able to monitor the peak primary current. this allows for cycle by cycle peak current control and limit. when the primary peak current multiplied by the i sense resistor is greater than 1.15v over current (ocp) is detected and the ic will immediately turn of f the base driver until the next cycle. the output driver will send out a switching pulse in the next cycle, and the switching pulse will continue if the ocp threshold is not reached; or, the switching pulse will turn off again if the ocp threshold is reached. if the ocp occurs for several consecutive switching cycles, the iw1677 shuts down. if the i sense resistor is shorted there is a potential danger of the over current condition not being detected. thus, the ic is designed to detect this sense-resistor-short fault after startup and shut down immediately . the v cc will be discharged since the ic remains biased. once v cc drops below the uvlo threshold, the controller resets itself and then initiates a new soft-start cycle. the controller continues attempting to startup, but does not fully startup until the fault condition is removed. 9.12 dynamic base current control one important feature of the iw1677 is that it directly drives a bjt switching device with dynamic base current control to optimize performance. the bjt base current ranges from 10ma to 31ma, and is dynamically controlled according to the power supply load change. the higher the output power, the higher the base current. specifcally, the base current is related to v ipk , as shown in figure 9.5. 0 10 20 30 40 base drive current (ma) 0.1 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 v ipk (v) 50 figure 9.5 : base drive current vs. v ipk iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
14 of 16 9.13 cable drop compensation the iw1677 incorporates an innovative method to compensate for any ir drop in the secondary circuitry including cable and cable connector. a 2.5-w adapter with 5v dc output has 3% deviation at 0.5 a load current due to the drop across a 24 awg, 1.8 meter dc cable without cable compensation. the iw1677 compensates for this voltage drop by providing a voltage offset to the feedback signal based on the amount of load current detected. the cable comp specifed in the table in section 11.0 refers to the voltage increment at pcb end from no-load to full-load conditions in the cv mode, with the assumption that the secondary diode voltage drop can be ignored at the point when the secondary voltage is sensed. also, the cable comp is specifed based on the nominal output voltage of 5v. for different output voltage, the actual voltage increment needs to be scaled accordingly. to calculate the amount of cable compensation needed, take the resistance of the cable and connector and multiply by the maximum output current. iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
15 of 16 10 physical dimensions 11 ordering information note 1: tape and reel packing quantity is 3,000/reel. minimum ordering quantity is 3,000. 1 3 4 6 5 2 6-lead sot package d compliant to jedec standard mo-178ab controlling dimensions are in millimeters this package is rohs compliant and halide free. soldering temperature resistance: [a] package is ipc/jedec std 020d moisture sensitivity level 1 [b] package exceeds jedec std no. 22-a111 for solder immersion resistance; packages can withstand 10 s immersion < 260oc dimension d does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.25 mm per side. the package top may be smaller than the package bottom. dimensions d and e1 are are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs and interlead flash, but including any mismatch between top and bottom of the plastic body. seating plane a1 coplanarity 0.10 e1 b e e1 a a2 c l symbol millimeters a1 min max 0.00 0.15 a - 1.45 b 0.30 0.50 c 0.08 0.22 d 2.80 3.00 e e1 e 0.95 bsc e1 1.90 bsc 2.80 bsc 1.60 bsc l 0.30 0.60 0 8 a2 0.90 1.30 e 2.90 bsc part no. options package description iw1677-00 cable comp = 0 mv so t - 23 tape & reel 1 IW1677-01 cable comp = 300 mv sot-23 tape & reel 1 iw1677-03 cable comp = 450 mv sot-23 tape & reel 1 iw1677-05 cable comp = 150 mv sot-23 tape & reel 1 iw1677 low-power off-line digital green-mode pwm controller rev. 2.0 datasheet ? 2016 dialog semiconductor www.dialog-semiconductor.com 3-june-2016
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